Jobs at Astera Labs

166 open job listings at Astera Labs, as of 2026-10-30. 3% are open to people with up to two years of experience, 0% can be done remotely and 41% state a salary. The most common locations are San Jose, Tel Aviv-Yafo and Bengaluru. Skills mentioned most often: python, c++, ml and linux. By field: engineering and software (111), design (27), other (6) and product management (5).

Latest openings

• Sr. Software Engineer - Manufacturing Data & Test InfrastructureAstera Labs
  San Jose, California, United States · Senior level · 2026-10-28 · View the original posting
• Senior Design Verification EngineerAstera Labs
  San Jose, California, United States · Senior level · 2026-10-27 · View the original posting
• Synthesis & STA Engineer – High-Speed SerDesAstera Labs
  San Jose, California, United States · Senior level · 2026-10-27 · View the original posting
• Principal Design Verification Engineer- SerDes/PHY IPAstera Labs
  San Jose, California, United States · Staff+ level · 2026-10-27 · View the original posting
• Principal Verification EngineerAstera Labs
  San Jose, California, United States · Staff+ level · 2026-10-26 · View the original posting
• Physical Design Team LeadAstera Labs
  Tel Aviv-Yafo, Tel Aviv District, Israel · Lead level · 2026-10-25 · View the original posting
• Physical Design Engineering DirectorAstera Labs
  Toronto, Ontario, Canada · Manager+ level · 2026-10-23 · View the original posting
• Principal Physical Design EngineerAstera Labs
  Bengaluru, Karnataka, India · Staff+ level · 2026-10-22 · View the original posting
• Principal EPMAstera Labs
  San Jose, California, United States · Staff+ level · 2026-10-21 · View the original posting
• Principal Post-Silicon Validation EngineerAstera Labs
  San Jose, California, United States · Staff+ level · 2026-10-20 · View the original posting
• Firmware EngineerAstera Labs
  San Jose, California, United States · Senior level · 2026-10-20 · View the original posting
• Principal / Senior Principal Electrical Design EngineerAstera Labs
  San Jose, California, United States · Staff+ level · 2026-10-19 · View the original posting
• Director ASIC Technical Program ManagementAstera Labs
  San Jose, California, United States · Manager+ level · 2026-10-15 · View the original posting
• Principal Digital Design EngineerAstera Labs
  San Jose, California, United States · Staff+ level · 2026-10-14 · View the original posting
• Principal Physical Design EngineerAstera Labs
  Singapore, Singapore · Staff+ level · 2026-10-13 · View the original posting
• Teach Lead Physical Design EngineerAstera Labs
  Singapore, Singapore · Lead level · 2026-10-13 · View the original posting
• Senior Analog Mixed-Signal IC Layout EngineerAstera Labs
  Singapore, Singapore · Senior level · 2026-10-13 · View the original posting
• Tech Lead Analog Mixed-Signal IC Layout EngineerAstera Labs
  Singapore, Singapore · Lead level · 2026-10-13 · View the original posting
• Analog Mixed Signal Design EngineerAstera Labs
  Singapore, Singapore · Mid level · 2026-10-13 · View the original posting
• Principal Mixed Analog Design EngineerAstera Labs
  Irvine, California, United States · Staff+ level · 2026-10-12 · View the original posting
• Principal Physical Design EngineerAstera Labs
  Ahmedabad, Gujarat, India · Staff+ level · 2026-10-12 · View the original posting
• Principal NPI Supply Planner - PCBAAstera Labs
  Suzhou Qu, Gansu, China · Staff+ level · 2026-10-12 · View the original posting
• Senior Manager, Global Environmental Health & SafetyAstera Labs
  San Jose, California, United States · Senior level · 2026-10-12 · View the original posting
• Senior Manager, Global Safety & SecurityAstera Labs
  San Jose, California, United States · Senior level · 2026-10-12 · View the original posting
• System Validation managerAstera Labs
  Haifa District, Israel · Senior level · 2026-10-11 · View the original posting
• Principal Physical Design CAD EngineerAstera Labs
  Haifa District, Israel · Staff+ level · 2026-10-11 · View the original posting
• Principal NPI PlannerAstera Labs
  Suzhou Qu, Gansu, China · Staff+ level · 2026-10-10 · View the original posting
• Principal Product Applications Engineer – ScorpioAstera Labs
  San Jose, California, United States · Staff+ level · 2026-10-07 · View the original posting
• Principal Ecosystem Partner ManagerAstera Labs
  San Jose, California, United States · Staff+ level · 2026-10-07 · View the original posting
• Principal SerDes Bring-up Validation EngineerAstera Labs
  San Jose, California, United States · Staff+ level · 2026-10-05 · View the original posting
• Principal Hardware NPI Program ManagerAstera Labs
  San Jose, California, United States · Staff+ level · 2026-10-05 · View the original posting
• Principal Digital Design EngineerAstera Labs
  San Jose, California, United States · Staff+ level · 2026-10-05 · View the original posting
• Principal FW/SW EngineerAstera Labs
  Toronto, Ontario, Canada · Staff+ level · 2026-10-05 · View the original posting
• PCIe Firmware ExpertAstera Labs
  Tel Aviv-Yafo, Tel Aviv District, Israel · Senior level · 2026-10-05 · View the original posting
• Senior Firmware SW EngineerAstera Labs
  Tel Aviv-Yafo, Tel Aviv District, Israel · Senior level · 2026-10-04 · View the original posting
• Senior Principal Test EngineerAstera Labs
  San Jose, California, United States · Staff+ level · 2026-10-01 · View the original posting
• Principal Logic Design EngineerAstera Labs
  Bengaluru, Karnataka, India · Staff+ level · 2026-09-30 · View the original posting
• Principal Engineer - Validation EngineeringAstera Labs
  San Jose, California, United States · Staff+ level · 2026-09-30 · View the original posting
• Tech Lead, Digital Design EngineerAstera Labs
  San Jose, California, United States · Lead level · 2026-09-30 · View the original posting
• Hardware Board Validation Engineering, DirectorAstera Labs
  San Jose, California, United States · Manager+ level · 2026-09-30 · View the original posting